Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
Set the bits so they store −42 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?
N = −428 bit
U =
2.Number systemsHard
A system must give every one of 892 items its own binary code of the same length. What is the smallest number of bits b needed?
892
b = bit
3.Digital logic: gates, K-maps & flip-flopsMedium
Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(2, 3, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15). How many product terms N does it have?
F(A, B, C, D) = Σm(2, 3, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15)
N =
4.Digital logic: gates, K-maps & flip-flopsHard
A 100 kHz clock drives a mod-12 counter. Find the frequency fout of its most significant output, which completes one cycle per counting cycle.
fclk = 100 kHzN = 12
fout = kHz
5.Data acquisition & samplingMedium
A UART sends bytes at 4800 baud in the format 8E1: 8 data bits, an even parity bit and 1 stop bit(s), plus the start bit. Find the largest number of data bytes per second it can transfer.
baud = 4800 Bd8E1
RB = B/s
6.Data acquisition & samplingHard
A 1.1 kHz square wave is sampled at 5 kHz with no anti-aliasing filter. A square wave contains the odd harmonics 3f₁, 5f₁, 7f₁, … At which frequency fa does its harmonic 5f₁ appear in the sampled data? Give it in Hz.
f₁ = 1.1 kHzfs = 5 kHzharmonic: 5f₁
fa = Hz
3Solutions
1.Number systems
Answer: U = 214
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Invert and add one
42 = 0010 1010
inverted: 1101 0101
+1 → 1101 0110
Read it as unsigned
1101 0110₂ = 256 − 42 = 214
Answer
U = 214
2.Number systems
Answer: b = 10 bit
Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.
Powers of two
29 = 512 < 892
210 = 1024 ≥ 892
Answer
b = 10
3.Digital logic: gates, K-maps & flip-flops
Answer: N = 5
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Group the 1s
Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.
BD
BC′
AD′
AC′
A′B′C
Minimal SOP form
F = BD + BC′ + AD′ + AC′ + A′B′C
N = 5
Answer
N = 5
4.Digital logic: gates, K-maps & flip-flops
Answer: fout = 8.333 kHz
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Frequency division
fout = 100 kHz / 12 = 8.333 kHz
Answer
fout = 8.333 kHz
5.Data acquisition & sampling
Answer: RB = 436.4 B/s
UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts Tb = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = fclk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.
Bits per frame
1 + 8 + 1 + 1 = 11
Byte rate
4800/11 = 436.4 B/s
Answer
RB = 436.4 B/s
6.Data acquisition & sampling
Answer: fa = 500 Hz
Sampling: an ADC measures the signal fs times per second. By the Nyquist–Shannon theorem a frequency f is captured correctly only while f < fs/2, the Nyquist (folding) frequency, so the sampling rate must exceed twice the highest signal frequency. A higher frequency is not lost: it shows up as an alias at fa = |f − k·fs|, with the whole number k that brings the result between 0 and fs/2. The samples cannot tell the two apart, so an analogue anti-aliasing filter must remove everything above fs/2 before the ADC.
Harmonic frequency
5f₁ = 5·1.1 kHz = 5.5 kHz
Nearest multiple of the sampling rate
m = round(1.1) = 1
Alias frequency
fa = |5500 − 1·5000| = 500 Hz
Answer
fa = 500 Hz
The alias lands inside the signal band, where no digital filter can remove it. Only an analogue filter before the ADC helps.
ExamProblems · examproblems.com/courses/digital-electronics