Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values
binary 2k, octal 8k, hex 16k
To decimal
Σ dk·bk
From decimal
divide by the base, read the remainders bottom-up
Hex ↔ binary
one hex digit = 4 bits
Two’s complement
invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion
fs > 2·fmax, fN = fs/2
Alias frequency
fa = |f − k·fs|, k = round(f/fs)
Step size
1 LSB = VFSR/2ᴺ
Quantisation error (rounding)
±½ LSB
Truncating ADC code
D = ⌊Vin/LSB⌋
Bits for a resolution r
2ᴺ ≥ span/r
Ideal SQNR, full-scale sine
SQNR = 6.02·N + 1.76 dB
Data rate
channels × fs × N bit/s
Multiplexed ADC
fs = 1/(n·(tc + tset))
UART
Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider
baud = fclk/(16·D)

Method

  1. Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
  2. For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
  3. For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
  4. For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium
8-bit two's complement0−12806403201608040201

Set the bits so they store −60 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?

N = −608 bit
U =
2.Number systemsHard
354 codes, b = ? bits?2ᵇ⁻¹…?4?2?1

A system must give every one of 354 items its own binary code of the same length. What is the smallest number of bits b needed?

354
b = bit
3.Digital logic: gates, K-maps & flip-flopsMedium
ABC000111100101324576

Simplify F = A′BC′ + A′B′C′ + A′B to its minimal sum-of-products form. How many literals L does the simplified expression contain?

F = A′BC′ + A′B′C′ + A′B
L =
4.Digital logic: gates, K-maps & flip-flopsHard
DQ3​Q3​DQ2​Q2​DQ1​Q1​DQ0​Q0​CLKJOHNSON

A 4-bit Johnson counter Q₃Q₂Q₁Q₀ starts at 0000. At every clock edge the bits shift one place to the right (Q₃ → Q₂ → Q₁ → Q₀) and Q₃ receives the inverse of Q₀. Give the state Q = Q₃Q₂Q₁Q₀ as a decimal number after 9 clock edges.

Q₃Q₂Q₁Q₀ = 00009
Q =
5.Data acquisition & samplingMedium
∿01N = 1225 kHz? MB

A recorder samples one channel at 25 kHz with a 12-bit ADC. Each sample is stored in whole bytes. Find the memory M needed for a 1 min recording, in MB (1 MB = 10⁶ bytes).

n = 1fs = 25 kHzN = 12t = 1 min
M = MB
6.Data acquisition & samplingHard
T10 mV/°C×2.5∿01N = 10, 2.5 V? °C/LSB

A temperature sensor gives 10 mV/°C (0 V at 0 °C). Its signal is amplified 2.5 times and fed to a 10-bit ADC with a range of 0 to 2.5 V (1 LSB = VFSR/2ᴺ). Find the temperature change ΔTLSB that corresponds to one LSB.

S = 10 mV/°CG = 2.5N = 10VFSR = 2.5 V
ΔTLSB = °C

3Solutions

1.Number systems

Answer: U = 196

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Invert and add one

60 = 0011 1100
inverted: 1100 0011
+1 → 1100 0100

Read it as unsigned

1100 0100₂ = 256 − 60 = 196

Answer

U = 196
2.Number systems

Answer: b = 9 bit

Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.

Powers of two

28 = 256 < 354
29 = 512 ≥ 354

Answer

b = 9
3.Digital logic: gates, K-maps & flip-flops

Answer: L = 4

Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.

Minterms of the expression

A′BC′ → m(2)
A′B′C′ → m(0)
A′B → m(2, 3)
ABC00011110011001131204050706

Group and read off

F = A′C′ + A′B

Count the literals

L = 4

Answer

L = 4
4.Digital logic: gates, K-maps & flip-flops

Answer: Q = 8

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

State after every edge

0000 → 1000 → 1100 → 1110 → 1111 → 0111 → 0011 → 0001 → 0000 → 1000

Decimal value

1000₂ = 8

Answer

Q = 8
5.Data acquisition & sampling

Answer: M = 3 MB

Data rates: every channel delivers fs samples per second of N bits, so the raw rate is channels × fs × N bit/s. In memory a sample takes whole bytes (a 12-bit sample is stored in 2 bytes), so the memory for a recording is channels × fs × bytes per sample × time. A multiplexed ADC converts the channels one after another: each conversion (with settling) takes t, so one round of n channels takes n·t and each channel is sampled at 1/(n·t).

Bytes per sample

⌈12/8⌉ = 2 B

Byte rate

1·25000·2 = 50000 B/s

Memory

M = 50000·60 = 3 × 10⁶ B = 3 MB

Answer

M = 3 MB
6.Data acquisition & sampling

Answer: ΔTLSB = 0.09766 °C

ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.

Step size

1 LSB = 2500/1024 = 2.441 mV

Sensitivity at the ADC

10·2.5 = 25 mV/°C

Temperature resolution

ΔTLSB = 2.441/25 = 0.09766 °C

Answer

ΔTLSB = 0.09766 °C

The ADC reaches full scale at 100 °C.

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