Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
The 8-bit pattern 1010 0001 stores a signed integer in two's complement. What is its value N in decimal?
1010 00018 bit
N =
2.Number systemsHard
Set the bits to the 8-bit result of 0011 1001 >> 1. What is the result's value R in decimal?
0011 1001>> 1
R =
3.Digital logic: gates, K-maps & flip-flopsMedium
Simplify F = ABC′ + AC′ + A′BC to its minimal sum-of-products form. How many literals L does the simplified expression contain?
F = ABC′ + AC′ + A′BC
L =
4.Digital logic: gates, K-maps & flip-flopsHard
A mod-12 counter has to count through 12 different states. What is the minimum number of flip-flops n it needs?
N = 12
n =
5.Data acquisition & samplingMedium
A recorder samples one channel at 25 kHz with a 24-bit ADC. Each sample is stored in whole bytes. Find the memory M needed for a 15 min recording, in MB (1 MB = 10⁶ bytes).
n = 1fs = 25 kHzN = 24t = 15 min
M = MB
6.Data acquisition & samplingHard
A 6-channel multiplexer feeds one ADC. Each conversion takes 10 µs, and after every channel switch the input needs 2.5 µs to settle. The channels are scanned in turn without pause. Find the sampling rate fs of each channel, in kHz.
n = 6tc = 10 µstset = 2.5 µs
fs = kHz
3Solutions
1.Number systems
Answer: N = −95
Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.
Add the place values
The other bits keep their normal positive values.
−128 + 32 + 1 = −95
Answer
N = −95
2.Number systems
Answer: R = 28
Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.
Bit by bit
Shifting right by 1 moves every bit 1 places to the right; bits that fall off the right end are lost and zeros come in on the left.
0011 1001 >> 1
= 0001 1100
Value of the result
0001 1100₂ = 28
Answer
R = 28
3.Digital logic: gates, K-maps & flip-flops
Answer: L = 5
Boolean algebra: the rules that simplify expressions are X + X′ = 1 and X·X′ = 0, X + X = X, absorption X + X·Y = X, the combining rule X·Y + X·Y′ = X, X + X′Y = X + Y and the consensus theorem XY + X′Z + YZ = XY + X′Z. De Morgan's laws turn (X·Y)′ into X′ + Y′ and (X + Y)′ into X′·Y′. A Karnaugh map applies these rules graphically: every group of two neighbouring cells is one use of XY + XY′ = X.
Minterms of the expression
ABC′ → m(6)
AC′ → m(4, 6)
A′BC → m(3)
Group and read off
F = AC′ + A′BC
Count the literals
L = 5
Answer
L = 5
4.Digital logic: gates, K-maps & flip-flops
Answer: n = 4
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.
Number of flip-flops
2ⁿ ≥ 12 → n = 4 (2⁴ = 16)
Answer
n = 4
5.Data acquisition & sampling
Answer: M = 67.5 MB
Data rates: every channel delivers fs samples per second of N bits, so the raw rate is channels × fs × N bit/s. In memory a sample takes whole bytes (a 12-bit sample is stored in 2 bytes), so the memory for a recording is channels × fs × bytes per sample × time. A multiplexed ADC converts the channels one after another: each conversion (with settling) takes t, so one round of n channels takes n·t and each channel is sampled at 1/(n·t).
Bytes per sample
⌈24/8⌉ = 3 B
Byte rate
1·25000·3 = 75000 B/s
Memory
M = 75000·900 = 6.75 × 10⁷ B = 67.5 MB
Answer
M = 67.5 MB
6.Data acquisition & sampling
Answer: fs = 13.33 kHz
Data rates: every channel delivers fs samples per second of N bits, so the raw rate is channels × fs × N bit/s. In memory a sample takes whole bytes (a 12-bit sample is stored in 2 bytes), so the memory for a recording is channels × fs × bytes per sample × time. A multiplexed ADC converts the channels one after another: each conversion (with settling) takes t, so one round of n channels takes n·t and each channel is sampled at 1/(n·t).
Time per channel
10 + 2.5 = 12.5 µs
Time per scan
6·12.5 = 75 µs
Sampling rate per channel
fs = 1/75 µs = 13.33 kHz
Answer
fs = 13.33 kHz
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