Number systems
- Place values
- binary 2k, octal 8k, hex 16k
- To decimal
- Σ dk·bk
- From decimal
- divide by the base, read the remainders bottom-up
- Hex ↔ binary
- one hex digit = 4 bits
- Two’s complement
- invert the bits and add 1
Digital Electronics: cram pack
Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.
1Formulas and methods
Digital logic: gates, K-maps & flip-flops
- Basic gates
- A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
- Boolean rules
- X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
- De Morgan
- (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
- Karnaugh map order
- 00, 01, 11, 10 (Gray code)
- Group of 2ᵏ cells
- loses k variables
- 4-to-1 multiplexer
- F = A′B′I0 + A′BI1 + AB′I2 + ABI3
- Flip-flops
- D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
- Counters
- n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
- Ripple counter
- fmax = 1/(n·tpd)
- Ring and Johnson counters
- n and 2n states
Method
- For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
- For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
- Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
- For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
Data acquisition & sampling
- Nyquist criterion
- fs > 2·fmax, fN = fs/2
- Alias frequency
- fa = |f − k·fs|, k = round(f/fs)
- Step size
- 1 LSB = VFSR/2ᴺ
- Quantisation error (rounding)
- ±½ LSB
- Truncating ADC code
- D = ⌊Vin/LSB⌋
- Bits for a resolution r
- 2ᴺ ≥ span/r
- Ideal SQNR, full-scale sine
- SQNR = 6.02·N + 1.76 dB
- Data rate
- channels × fs × N bit/s
- Multiplexed ADC
- fs = 1/(n·(tc + tset))
- UART
- Tb = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
- Baud rate divider
- baud = fclk/(16·D)
Method
- Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
- For sampling questions, compare each frequency with fs/2; a higher frequency appears at fa = |f − k·fs| with the nearest multiple of fs.
- For resolution questions, find 1 LSB = VFSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
- For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.
2Practice problems
1.Number systemsMedium
Write −58 as an 8-bit two's complement pattern. Read the pattern as an unsigned binary number: what is its value U in decimal?
N = −588 bit
U =
2.Number systemsHard
A system must give every one of 2198 items its own binary code of the same length. What is the smallest number of bits b needed?
2198
b = bit
3.Digital logic: gates, K-maps & flip-flopsMedium
A 4-to-1 multiplexer has its select inputs S₁ = A and S₀ = B, and its data inputs tied to I₀ = C′, I₁ = C, I₂ = 0, I₃ = 1. For how many of the 8 combinations of A, B and C is the output F = 1? Find N.
I₀ = C′I₁ = CI₂ = 0I₃ = 1
N =
4.Digital logic: gates, K-maps & flip-flopsHard
For F(A, B, C, D) = Σm(8, 10, 11, 13, 14) + d(2, 4, 5, 9), where d marks the don't-care conditions, find the number N of essential prime implicants.
F(A, B, C, D) = Σm(8, 10, 11, 13, 14) + d(2, 4, 5, 9)
N =
5.Data acquisition & samplingMedium
Find the ideal signal-to-quantisation-noise ratio SQNR of a 6-bit ADC for a full-scale sine wave.
N = 6
SQNR = dB
6.Data acquisition & samplingHard
A 2-channel multiplexer feeds one ADC. Each conversion takes 2.5 µs, and after every channel switch the input needs 2.5 µs to settle. The channels are scanned in turn without pause. Find the sampling rate fs of each channel, in kHz.
n = 2tc = 2.5 µstset = 2.5 µs
fs = kHz
3Solutions
1.Number systems
Answer: U = 198
Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.
Invert and add one
58 = 0011 1010
inverted: 1100 0101
+1 → 1100 0110
Read it as unsigned
1100 0110₂ = 256 − 58 = 198
Answer
U = 198
2.Number systems
Answer: b = 12 bit
Positional number systems: each digit is worth its value times a power of the base. In binary the places are worth 1, 2, 4, 8, 16, …; in hexadecimal 1, 16, 256, …, with A–F standing for 10–15. In 8-bit two's complement the leftmost bit is worth −128 instead of +128, which is how negative numbers are stored.
Powers of two
211 = 2048 < 2198
212 = 4096 ≥ 2198
Answer
b = 12
3.Digital logic: gates, K-maps & flip-flops
Answer: N = 4
Multiplexer: a 2ⁿ-to-1 multiplexer passes one of its data inputs to the output; the select lines, read as a binary number, pick which one. For a 4-to-1 MUX with selects S₁S₀ = AB, F = A′B′·I₀ + A′B·I₁ + AB′·I₂ + AB·I₃. Tying the data inputs to 0, 1, C or C′ makes the MUX produce any function of A, B and C, which is a common way to build logic with one chip.
Output expression
F = A′B′C′ + A′BC + AB
Rows with F = 1
ABC = 000, 011, 110, 111
N = 4
Answer
N = 4
4.Digital logic: gates, K-maps & flip-flops
Answer: N = 2
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Prime implicants
The largest groups that can be formed from 1s and Xs.
B′CD′, BC′D, AC′D, ACD′, AB′
Essential prime implicants
ACD′, AB′
N = 2
Answer
N = 2
5.Data acquisition & sampling
Answer: SQNR = 37.88 dB
ADC resolution: an N-bit converter divides its full-scale range VFSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = VFSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊Vin/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.
Ideal SQNR
SQNR = 6.02·6 + 1.76 = 37.88 dB
Answer
SQNR = 37.88 dB
6.Data acquisition & sampling
Answer: fs = 100 kHz
Data rates: every channel delivers fs samples per second of N bits, so the raw rate is channels × fs × N bit/s. In memory a sample takes whole bytes (a 12-bit sample is stored in 2 bytes), so the memory for a recording is channels × fs × bytes per sample × time. A multiplexed ADC converts the channels one after another: each conversion (with settling) takes t, so one round of n channels takes n·t and each channel is sampled at 1/(n·t).
Time per channel
2.5 + 2.5 = 5 µs
Time per scan
2·5 = 10 µs
Sampling rate per channel
fs = 1/10 µs = 100 kHz
Answer
fs = 100 kHz
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