Digital Electronics: cram pack

Formula sheets, the key method steps for every topic and 6 practice problems, with full solutions at the back.

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1Formulas and methods

Number systems

Place values: binary 2^k, octal 8^k, hex 16^k
To decimal: Σ d_k·b^k
From decimal: divide by the base, read the remainders bottom-up
Hex ↔ binary: one hex digit = 4 bits
Two’s complement: invert the bits and add 1

Digital logic: gates, K-maps & flip-flops

Basic gates: A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules: X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan: (X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order: 00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells: loses k variables
4-to-1 multiplexer: F = A′B′I₀ + A′BI₁ + AB′I₂ + ABI₃
Flip-flops: D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters: n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; f_out = f_clk/N
Ripple counter: f_max = 1/(n·t_pd)
Ring and Johnson counters: n and 2n states

Method

For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

Data acquisition & sampling

Nyquist criterion: f_s > 2·f_max, f_N = f_s/2
Alias frequency: f_a = |f − k·f_s|, k = round(f/f_s)
Step size: 1 LSB = V_FSR/2ᴺ
Quantisation error (rounding): ±½ LSB
Truncating ADC code: D = ⌊V_in/LSB⌋
Bits for a resolution r: 2ᴺ ≥ span/r
Ideal SQNR, full-scale sine: SQNR = 6.02·N + 1.76 dB
Data rate: channels × f_s × N bit/s
Multiplexed ADC: f_s = 1/(n·(t_c + t_set))
UART: T_b = 1/baud; 8N1 = 10 bits per byte; bytes/s = baud/bits per frame
Baud rate divider: baud = f_clk/(16·D)

Method

Write down what is given: sampling rate, signal frequencies, number of bits, input range, baud rate.
For sampling questions, compare each frequency with f_s/2; a higher frequency appears at f_a = |f − k·f_s| with the nearest multiple of f_s.
For resolution questions, find 1 LSB = V_FSR/2ᴺ, or the smallest N with 2ᴺ ≥ span/resolution.
For data rates and UART links, count everything that is sent: channels, samples per second, bits or whole bytes per sample, and the start, parity and stop bits of every frame.

2Practice problems

1.Number systemsMedium

Set the bits so they store −75 in 8-bit two's complement. Read as an unsigned number, what is the pattern's value U?

N = −758 bit

U =

2.Number systemsHard

Set the bits to the 8-bit result of 1100 0000 OR 0010 1001. What is the result's value R in decimal?

1100 0000OR0010 1001

R =

3.Digital logic: gates, K-maps & flip-flopsMedium

In this Karnaugh map exactly one 1 has no neighbouring 1, so it stays a group of one cell (a full minterm of four literals) in the minimal SOP form. Neighbours across the map edges count. Click that cell.

F = Σm(7, 8, 9, 13)

1AB = 00, CD = 00
2AB = 00, CD = 01
3AB = 00, CD = 11
4AB = 00, CD = 10
5AB = 01, CD = 00
6AB = 01, CD = 01
7AB = 01, CD = 11
8AB = 01, CD = 10
9AB = 11, CD = 00
10AB = 11, CD = 01
11AB = 11, CD = 11
12AB = 11, CD = 10
13AB = 10, CD = 00
14AB = 10, CD = 01
15AB = 10, CD = 11
16AB = 10, CD = 10

4.Digital logic: gates, K-maps & flip-flopsHard

A 4-bit shift register Q₃Q₂Q₁Q₀ holds 1111. At every clock edge the bits shift one place to the right (Q₃ → Q₂ → Q₁ → Q₀, Q₀ is lost) and the serial input enters Q₃. The serial input is 0, 0, 0, 0, 1 at the 5 edges. Give the final state Q = Q₃Q₂Q₁Q₀ as a decimal number.

Q₃Q₂Q₁Q₀ = 11110, 0, 0, 0, 1

Q =

5.Data acquisition & samplingMedium

Find the ideal signal-to-quantisation-noise ratio SQNR of a 12-bit ADC for a full-scale sine wave.

N = 12

SQNR = dB

6.Data acquisition & samplingHard

A 1.92 kHz square wave is sampled at 8 kHz with no anti-aliasing filter. A square wave contains the odd harmonics 3f₁, 5f₁, 7f₁, … At which frequency f_a does its harmonic 7f₁ appear in the sampled data? Give it in Hz.

f₁ = 1.92 kHzf_s = 8 kHzharmonic: 7f₁

f_a = Hz

3Solutions

1.Number systems

Answer: U = 181

Setting bits: each bit is worth a power of two (128, 64, …, 1). One hex digit is exactly four bits, and in 8-bit two's complement the leftmost bit is worth −128. Bitwise operations work on each bit position separately.

Invert and add one

75 = 0100 1011

inverted: 1011 0100

+1 → 1011 0101

Read it as unsigned

1011 0101₂ = 256 − 75 = 181

Answer

U = 181

2.Number systems

Answer: R = 233

Bit by bit

OR gives 1 where at least one bit is 1.

1100 0000

OR 0010 1001

= 1110 1001

Value of the result

1110 1001₂ = 233

Answer

R = 233

3.Digital logic: gates, K-maps & flip-flops

Answer: AB = 01, CD = 11

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Neighbours of each 1

A 1 with a neighbouring 1 can join a group of two or more.

m7: m6, m5, m3, m15 → 0

The isolated 1

m7 = A′BCD → AB = 01, CD = 11

Answer

AB = 01, CD = 11

4.Digital logic: gates, K-maps & flip-flops

Answer: Q = 8

Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at f_clk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.

State after every edge

1111 → 0111 → 0011 → 0001 → 0000 → 1000

Decimal value

1000₂ = 8

Answer

Q = 8

5.Data acquisition & sampling

Answer: SQNR = 74 dB

ADC resolution: an N-bit converter divides its full-scale range V_FSR into 2ᴺ codes, from 0 to 2ᴺ − 1. One step is 1 LSB = V_FSR/2ᴺ: the smallest change the converter can show. A truncating ADC gives the code ⌊V_in/LSB⌋; a rounding ADC is never more than ½ LSB away from the true value, its quantisation error. Every extra bit halves the LSB and adds about 6 dB to the ideal signal-to-quantisation-noise ratio SQNR = 6.02·N + 1.76 dB for a full-scale sine. To reach a resolution r over a span, choose the smallest N with 2ᴺ ≥ span/r.

Ideal SQNR

SQNR = 6.02·12 + 1.76 = 74 dB

Answer

SQNR = 74 dB

6.Data acquisition & sampling

Answer: f_a = 2560 Hz

Sampling: an ADC measures the signal f_s times per second. By the Nyquist–Shannon theorem a frequency f is captured correctly only while f < f_s/2, the Nyquist (folding) frequency, so the sampling rate must exceed twice the highest signal frequency. A higher frequency is not lost: it shows up as an alias at f_a = |f − k·f_s|, with the whole number k that brings the result between 0 and f_s/2. The samples cannot tell the two apart, so an analogue anti-aliasing filter must remove everything above f_s/2 before the ADC.

Harmonic frequency

7f₁ = 7·1.92 kHz = 13.44 kHz

Nearest multiple of the sampling rate

m = round(1.68) = 2

Alias frequency

f_a = |13440 − 2·8000| = 2560 Hz

Answer

f_a = 2560 Hz

The alias lands inside the signal band, where no digital filter can remove it. Only an analogue filter before the ADC helps.

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