Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.
Wheatstone bridge & strain gauges
Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε
Method
Treat the bridge as two voltage dividers across the same supply.
For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.
Digital logic: gates, K-maps & flip-flops
Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states
Method
For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
2Practice problems
1.Diodes & transistorsMedium
2 yellow LEDs (forward voltage 2.1 V each) are connected in series with a resistor to a 9 V supply. Find the resistance R that sets the current to 15 mA.
Vs = 9 VVF = 2.1 Vn = 2I = 15 mA
R = Ω
2.Diodes & transistorsHard
A 5.6 V Zener regulator must supply up to 10 mA to a load. The input can drop to 20 V, and the Zener needs at least 5 mA to regulate. Find the largest series resistance Rmax that keeps it regulating.
The source Vₛ charges the capacitor through R₁, and R₂ is connected in parallel with C. The capacitor is uncharged when the switch closes at t = 0. Find the capacitor voltage vC at t = 25 ms.
Vs = 15 VR1 = 1 kΩR2 = 2.2 kΩC = 33 µFt = 25 ms
vC = V
6.RC & RL transientsHard
The switch has been closed for a long time, so the circuit is in steady state. At t = 0 the switch opens. Find the capacitor voltage vC at t = 30 ms.
Vs = 6 VR1 = 2.2 kΩR2 = 2.2 kΩC = 22 µFt = 30 ms
vC = V
7.Series & parallel resistorsMedium
Find the current IR2 through R2.
V1 = 10 VR1 = 3 ΩR2 = 6 ΩR3 = 6 ΩR4 = 6 Ω
IR2 = A
8.Series & parallel resistorsHard
Find the current IR1 delivered by the source, which flows through R1.
An ideal boost converter turns 15 V into 37.5 V at 25 kHz with L = 330 µH. Find the peak-to-peak inductor ripple current ΔIL.
Vin = 15 VVo = 37.5 Vf = 25 kHzL = 330 µH
ΔIL = A
10.DC-DC convertersHard
A buck converter turns 24 V into 7.2 V at 50 kHz with L = 68 µH. Find the smallest load current Io,min for which it stays in continuous conduction.
Vin = 24 VVo = 7.2 Vf = 50 kHzL = 68 µH
Io,min = A
11.Wheatstone bridge & strain gaugesMedium
A bridge has four 120 Ω arms and Vs = 15 V. The sensor R₂ increases by ΔR = 30 Ω. Find the exact output Vab in mV.
Vs = 15 VR = 120 ΩΔR = 30 Ω
Vab = mV
12.Wheatstone bridge & strain gaugesHard
A load cell (a full bridge of strain gauges) has a rated output of 1.5 mV/V at its rated load of 500 kg. It is excited with 5 V. Find its output Vo under a load of 100 kg.
Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(2, 3, 6, 8, 10, 11, 12, 15). How many product terms N does it have?
F(A, B, C, D) = Σm(2, 3, 6, 8, 10, 11, 12, 15)
N =
14.Digital logic: gates, K-maps & flip-flopsHard
Find the minimal SOP form of F(A, B, C, D) = Σm(2, 5, 7, 8, 12, 13, 15) + d(4, 9), where d marks the don't-care conditions. How many product terms N does it have?
LED and diode circuits: a forward-biased LED drops roughly its forward voltage VF (about 2 V for red, 3 V for blue or white), whatever the current. A series resistor sets the current: R = (Vs − n·VF)/I for n LEDs in series. With a more exact diode model V = V₀ + I·rd, the operating point is where the diode line meets the load line I = (Vs − V)/R, so I = (Vs − V₀)/(R + rd).
Voltage across the resistor
VR = 9 − 2·2.1 = 4.8 V
Resistance
R = 4.8/0.015 = 320 Ω
Answer
R = 320 Ω
The resistor dissipates 72 mW.
2.Diodes & transistors
Answer: Rmax = 960 Ω
Zener regulator: a reverse-biased Zener diode holds its voltage VZ while its current stays above a minimum IZ,min. The series resistor R takes the difference between input and output: IR = (Vin − VZ)/R. That current splits between the load, IL = VZ/RL, and the Zener: IZ = IR − IL. Design for the worst cases: the lowest input with the largest load must still leave IZ,min, and the highest input with no load gives the largest Zener power PZ = VZ·IZ.
Worst-case current
IR = 10 + 5 = 15 mA
Largest resistance
Rmax = 14.4/0.015 = 960 Ω
Answer
Rmax = 960 Ω
3.Op-amp circuits
Answer: Rf = 9.4 kΩ
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Gain of a non-inverting amplifier
V₋ = V₊ = Vin, and the current through R₁ also flows through Rf, so Vout = Vin·(1 + Rf/R₁).
Av = 1 + Rf/R1
Rf = (3 − 1)·4.7 = 9.4 kΩ
Answer
Rf = 9.4 kΩ
4.Op-amp circuits
Answer: Vout = 3.077 V
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Input currents
V₋ = 0, so each input resistor has its full input voltage across it.
I1 = V1/R1 = −0.6/47 = −0.01277 mA
I2 = V2/R2 = −1.8/100 = −0.018 mA
If = I1 + I2 = −0.03077 mA
Output voltage
Vout = −Rf·If = −100·(−0.03077) = 3.077 V
Answer
Vout = 3.077 V
5.RC & RL transients
Answer: vC = 6.886 V
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Thévenin equivalent seen by the capacitor
Short the source to find Rth; open the capacitor to find the voltage it will settle at.
Rth = R1 ∥ R2 = 1·2.2/(1 + 2.2) = 0.6875 kΩ
vC(∞) = 15·2.2/(1 + 2.2) = 10.31 V
Time constant
τ = Rth·C = 0.6875·33 = 22.69 ms
Charging curve
vC(t) = 10.31·(1 − e−25/22.69) = 6.886 V
Answer
vC = 6.886 V
6.RC & RL transients
Answer: vC = 1.614 V
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Initial capacitor voltage
In steady state the capacitor is an open circuit, so R₁ and R₂ form a voltage divider. The capacitor voltage cannot jump when the switch opens.
vC(0) = 6·2.2/(2.2 + 2.2) = 3 V
Time constant after the switch opens
τ = R2·C = 2.2·22 = 48.4 ms
Discharge
vC(t) = 3·e−30/48.4 = 1.614 V
Answer
vC = 1.614 V
7.Series & parallel resistors
Answer: IR2 = 0.9524 A
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R3 + R4 = 6 + 6 = 12 Ω
R2 ∥ 12 = 6·12/(6+12) = 4 Ω
Req = R1 + 4 = 3 + 4 = 7 Ω
Current from the source
The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.
IR1 = V1/Req = 10/7 = 1.429 A
Current through R₂
Subtract the drop across R₁ to get the voltage at node A, which is the voltage across R₂.
VA = V1 − IR1·R1 = 10 − 1.429·3 = 5.714 V
IR2 = VA/R2 = 5.714/6 = 0.9524 A
Answer
IR2 = 0.9524 A
8.Series & parallel resistors
Answer: IR1 = 0.5582 A
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R5 + R6 = 12 + 15 = 27 Ω
R4 ∥ 27 = 11.49 Ω
R3 + 11.49 = 23.49 Ω
R2 ∥ 23.49 = 4.122 Ω
Req = R1 + 4.122 = 12 + 4.122 = 16.12 Ω
Current from the source
The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.
IR1 = V1/Req = 9/16.12 = 0.5582 A
Answer
IR1 = 0.5582 A
9.DC-DC converters
Answer: ΔIL = 1.091 A
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 1 − 15/37.5 = 0.6
Inductor voltage during the on-time
While S is on, the inductor sits directly across Vin.
VL = 15 V
Ripple current
ΔIL = VL·D/(L·f) = 15·0.6/(330·10⁻⁶·25·10³) = 1.091 A
Answer
ΔIL = 1.091 A
10.DC-DC converters
Answer: Io,min = 0.7412 A
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 7.2/24 = 0.3
Ripple current
ΔIL = 7.2·0.7/(68·10⁻⁶·50·10³) = 1.482 A
Boundary load current
Io,min = ΔIL/2 = 0.7412 A
Answer
Io,min = 0.7412 A
Below this current the converter enters discontinuous conduction and Vo rises above D·Vin.
11.Wheatstone bridge & strain gauges
Answer: Vab = 833.3 mV
Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.
Node voltages
Va = 15·150/270 = 8.333 V
Vb = 7.5 V
Output
Vab = 833.3 mV
Answer
Vab = 833.3 mV
The linear estimate Vs·ΔR/(4R) = 937.5 mV is 12.5 % too high: a quarter bridge is not quite linear.
12.Wheatstone bridge & strain gauges
Answer: Vo = 1.5 mV
Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.
Full-scale output
1.5·5 = 7.5 mV
Output at this load
Vo = 7.5·100/500 = 1.5 mV
Answer
Vo = 1.5 mV
13.Digital logic: gates, K-maps & flip-flops
Answer: N = 4
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Group the 1s
Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.
B′C
A′CD′
AC′D′
ACD
Minimal SOP form
F = B′C + A′CD′ + AC′D′ + ACD
N = 4
Answer
N = 4
14.Digital logic: gates, K-maps & flip-flops
Answer: N = 3
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Prime implicants
The largest groups that can be formed from 1s and Xs.