Electronics 1: cram pack

Formula sheets, the key method steps for every topic and 14 practice problems, with full solutions at the back.

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1Formulas and methods

Diodes & transistors

Diode (constant drop)
VD = 0.7 V when conducting
Active region
VBE = 0.7 V, IC = β·IB, IE = (β + 1)·IB
Fixed bias
IB = (VCC − 0.7)/RB
Divider bias
IB = (VTH − 0.7)/(RTH + (β + 1)RE)
Thévenin of the divider
VTH = VCC·R2/(R1 + R2), RTH = R1∥R2
Collector loop
VCE = VCC − ICRC − IERE
Saturation
IC(sat) = (VCC − VCE(sat))/RC, IB ≥ IC(sat)/β

Op-amp circuits

Inverting amplifier
Vout = −(Rf/Rin)·Vin
Non-inverting amplifier
Vout = (1 + Rf/R1)·Vin
Summing amplifier
Vout = −Rf(V1/R1 + V2/R2)
Ideal op-amp
V+ = V−, Iin = 0

RC & RL transients

Time constant
τ = RC | τ = L/R
Response
x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ
Capacitor at DC
open circuit; vC cannot jump
Inductor at DC
short circuit; iL cannot jump
Settled
t ≈ 5τ

Method

  1. Find the initial value just after switching: a capacitor voltage and an inductor current cannot jump.
  2. Find the final value long after switching: a capacitor acts as an open circuit, an inductor as a short circuit.
  3. Find the time constant: τ = RC or τ = L/R, using the resistance seen by the capacitor or inductor.
  4. Use x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ.

Series & parallel resistors

Resistors in series
Req = R1 + R2 + …
Resistors in parallel
1/Req = 1/R1 + 1/R2 + …
Two in parallel
Req = R1R2 / (R1 + R2)
Ohm's law
V = I·R
Power
P = V·I = I²R = V²/R

Method

  1. Start at the end of the network furthest from the terminals.
  2. Combine resistors in series by adding them, and resistors in parallel with 1/R = 1/R₁ + 1/R₂ + …
  3. Redraw the circuit after each step.
  4. Repeat until one resistor is left between the terminals.

DC-DC converters

Buck
Vo = D·Vin
Boost
Vo = Vin/(1 − D)
Inverting buck-boost
|Vo| = Vin·D/(1 − D)
Ideal power balance
VinIin = VoIo
Inductor ripple
ΔIL = VL,on·D/(L·f); buck Vin − Vo, boost and buck-boost Vin
Average inductor current
buck Io; boost and buck-boost Io/(1 − D)
Output ripple
buck ΔIL/(8fC); boost and buck-boost Io·D/(fC)
CCM boundary
buck (1 − D)R/(2f); boost D(1 − D)²R/(2f); buck-boost (1 − D)²R/(2f)

Method

  1. Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
  2. Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
  3. Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
  4. For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.

Wheatstone bridge & strain gauges

Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε

Method

  1. Treat the bridge as two voltage dividers across the same supply.
  2. For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
  3. For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
  4. For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

2Practice problems

1.Diodes & transistorsMedium
+−12 V100 Ω5.1 V2200 ΩIZ​ = ?

A 5.1 V Zener regulator is fed from 12 V through 100 Ω and supplies a 2200 Ω load. Find the Zener current IZ.

Vin = 12 VVZ = 5.1 VR = 100 ΩRL = 2200 Ω
IZ = mA
2.Diodes & transistorsHard
RC​ = 680 Ωβ = 50VCC​ = 12 V5 VRB​ = ?

An NPN transistor with β = 50 switches a 680 Ω load resistor connected between VCC = 12 V and its collector. The emitter is grounded. The base is driven from a 5 V logic output through a base resistor RB. Take VBE = 0.7 V and VCE(sat) = 0.2 V. Find the largest base resistor RB, in kΩ, that still drives the transistor just into saturation.

VCC = 12 VRC = 680 Ωβ = 50Vin = 5 VVBE = 0.7 VVCE(sat) = 0.2 V
RB = kΩ
3.Op-amp circuitsMedium
−+Vout​Rf​ = 47 kΩR1​ = 2 kΩVin​ = −0.2 V

The op-amp is ideal and runs from ±15 V supplies. Find the output voltage Vout.

Vin = −0.2 VR1 = 2 kΩRf = 47 kΩ
Vout = V
4.Op-amp circuitsHard
−+Vout​Rf​ = 100 kΩV1​ = −1.9 VR1​ = 100 kΩV2​ = 1.2 VR2​ = 22 kΩIf​

The summing amplifier uses an ideal op-amp with ±15 V supplies. Find the current If through the feedback resistor, flowing towards the output.

V1 = −1.9 VV2 = 1.2 VR1 = 100 kΩR2 = 22 kΩRf = 100 kΩ
If = mA
5.RC & RL transientsMedium
+−Vs​20 Vt = 0R1​ = 4.7 kΩR2​ = 3.3 kΩC68 µF+−vC​

The source Vₛ charges the capacitor through R₁, and R₂ is connected in parallel with C. The capacitor is uncharged when the switch closes at t = 0. Find the time constant τ of the circuit after the switch closes.

Vs = 20 VR1 = 4.7 kΩR2 = 3.3 kΩC = 68 µF
τ = ms
6.RC & RL transientsHard
+−Vs​20 Vt = 0R = 2.2 kΩC22 µF+−vC​vC​(0) = 15 V

Just before the switch closes at t = 0, the capacitor holds 15 V with the polarity shown. How long does it take for vC to reach 17 V? Find t.

Vs = 20 VR = 2.2 kΩC = 22 µFvC(0) = 15 V
t = ms
7.Series & parallel resistorsMedium
R1​ = 20 ΩR3​ = 8 Ω+−V1​12 VR2​20 ΩIR2​AR4​4 ΩB

Find the current IR2 through R2.

V1 = 12 VR1 = 20 ΩR2 = 20 ΩR3 = 8 ΩR4 = 4 Ω
IR2 = A
8.Series & parallel resistorsHard
R1​ = 30 ΩR3​ = 8 ΩR5​ = 30 Ω+−V1​15 VR2​8 ΩIR2​AR4​10 ΩBR6​5 Ω

Find the current IR2 through R2.

V1 = 15 VR1 = 30 ΩR2 = 8 ΩR3 = 8 ΩR4 = 10 ΩR5 = 30 ΩR6 = 5 Ω
IR2 = A
9.DC-DC convertersMedium
tiL​Imax​Imin​ΔI = ?DTT2T

An ideal boost converter turns 15 V into 30 V at 200 kHz with L = 68 µH. Find the peak-to-peak inductor ripple current ΔIL.

Vin​ = 15 VVo​ = 30 Vf = 200 kHzL = 68 µH
ΔIL = A
10.DC-DC convertersHard
tvo​Vo​ΔV = ?DTT2T

A buck converter turns 12 V into 3.6 V for a 2 Ω load at 20 kHz, with L = 47 µH and C = 470 µF. Find the peak-to-peak output voltage ripple ΔVo in mV.

Vin​ = 12 VVo​ = 3.6 Vf = 20 kHzL = 47 µHC = 470 µF
ΔVo = mV
11.Wheatstone bridge & strain gaugesMedium
+−6 VR1​ = 50 ΩR2​ = 80 ΩR3​ = 400 ΩR4​ = 250 Ωab+−Rth​ = ?

Find the Thévenin resistance Rth of the bridge shown, seen from the output terminals a and b.

Vs = 6 VR1 = 50 ΩR2 = 80 ΩR3 = 400 ΩR4 = 250 Ω
Rth = Ω
12.Wheatstone bridge & strain gaugesHard
+−V1000 Ω1000 Ω + ΔR1000 Ω1000 Ωab+−

A 1000 Ω strain gauge with gauge factor 2.05 is bonded to a steel bar. Under load its resistance rises by 2.05 Ω. Find the strain ε in microstrain (µε).

R = 1000 ΩGF = 2.05ΔR = 2.05 Ω
ε = µε
13.Digital logic: gates, K-maps & flip-flopsMedium
ABCD000111100001111000110312040517060121131150141819011010

Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(1, 2, 7, 8, 9, 13, 15). How many product terms N does it have?

F(A, B, C, D) = Σm(1, 2, 7, 8, 9, 13, 15)
N =
14.Digital logic: gates, K-maps & flip-flopsHard
ABCD00011110000111101001030214151716X12X13X150140819011010

For F(A, B, C, D) = Σm(0, 4, 5, 6, 7, 9) + d(12, 13, 15), where d marks the don't-care conditions, find the number N of essential prime implicants.

F(A, B, C, D) = Σm(0, 4, 5, 6, 7, 9) + d(12, 13, 15)
N =

3Solutions

1.Diodes & transistors

Answer: IZ = 66.68 mA

Zener regulator: a reverse-biased Zener diode holds its voltage VZ while its current stays above a minimum IZ,min. The series resistor R takes the difference between input and output: IR = (Vin − VZ)/R. That current splits between the load, IL = VZ/RL, and the Zener: IZ = IR − IL. Design for the worst cases: the lowest input with the largest load must still leave IZ,min, and the highest input with no load gives the largest Zener power PZ = VZ·IZ.

Resistor current

IR = 6.9/100 = 69 mA

Load current

IL = 5.1/2200 = 2.318 mA

Zener current

IZ = 69 − 2.318 = 66.68 mA

Answer

IZ = 66.68 mA
2.Diodes & transistors

Answer: RB = 12.39 kΩ

BJT as a switch: to switch a load fully on, the transistor is driven into saturation, where VCE = VCE(sat) and the collector current is set by the load: IC(sat) = (VCC − VCE(sat))/RC. Saturation needs at least IB = IC(sat)/β. If the base current is smaller, the transistor stays active and IC = β·IB.

Collector current in saturation

IC(sat) = (12 − 0.2)/680 = 17.35 mA

Minimum base current

IB(min) = IC(sat)/β = 17.35/50 = 347.1 µA

Base resistor

RB = (5 − 0.7)/IB = 4.3 V/0.3471 mA = 12.39 kΩ

Answer

RB = 12.39 kΩ

Any smaller base resistor also saturates the transistor; in practice you pick one a few times smaller.

3.Op-amp circuits

Answer: Vout = −4.9 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Inverting input follows the input

V₋ = V₊ = −0.2 V
I = V₋/R1 = −0.2/2 = −0.1 mA

Output voltage

The current through R₁ also flows through Rf.

Vout = V₋ + I·Rf = −0.2 + (−0.1)·47 = −4.9 V

Answer

Vout = −4.9 V
4.Op-amp circuits

Answer: If = 0.03555 mA

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Input currents

V₋ = 0, so each input resistor has its full input voltage across it.

I1 = V1/R1 = −1.9/100 = −0.019 mA
I2 = V2/R2 = 1.2/22 = 0.05455 mA
If = I1 + I2 = 0.03555 mA

Answer

If = 0.03555 mA
5.RC & RL transients

Answer: τ = 131.8 ms

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Thévenin equivalent seen by the capacitor

Short the source to find Rth; open the capacitor to find the voltage it will settle at.

Rth = R1 ∥ R2 = 4.7·3.3/(4.7 + 3.3) = 1.939 kΩ
vC(∞) = 20·3.3/(4.7 + 3.3) = 8.25 V

Time constant

τ = Rth·C = 1.939·68 = 131.8 ms

Answer

τ = 131.8 ms
6.RC & RL transients

Answer: t = 24.72 ms

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Initial value, final value, time constant

The capacitor voltage cannot jump, so it starts at its stored value and heads for the source voltage.

vC(0) = 15 V, vC(∞) = Vs = 20 V
τ = R·C = 2.2 kΩ · 22 µF = 48.4 ms
vC(t) = 20 + (15 − 20)·e−t/τ

Solve for the time

17 = 20 + (−5)·e−t/τ → e−t/τ = (17 − 20)/(15 − 20) = 0.6
t = τ·ln((15 − 20)/(17 − 20)) = 48.4·ln(1.667) = 24.72 ms

Answer

t = 24.72 ms
7.Series & parallel resistors

Answer: IR2 = 0.1636 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 20 ΩR3​ = 8 Ω+−V1​12 VR2​20 ΩAR4​4 ΩB

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R3 + R4 = 8 + 4 = 12 Ω
R2 ∥ 12 = 20·12/(20+12) = 7.5 Ω
Req = R1 + 7.5 = 20 + 7.5 = 27.5 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 12/27.5 = 0.4364 A

Current through R₂

Subtract the drop across R₁ to get the voltage at node A, which is the voltage across R₂.

VA = V1 − IR1·R1 = 12 − 0.4364·20 = 3.273 V
IR2 = VA/R2 = 3.273/20 = 0.1636 A

Answer

IR2 = 0.1636 A
8.Series & parallel resistors

Answer: IR2 = 0.2819 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 30 ΩR3​ = 8 ΩR5​ = 30 Ω+−V1​15 VR2​8 ΩAR4​10 ΩBR6​5 Ω

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R5 + R6 = 30 + 5 = 35 Ω
R4 ∥ 35 = 7.778 Ω
R3 + 7.778 = 15.78 Ω
R2 ∥ 15.78 = 5.308 Ω
Req = R1 + 5.308 = 30 + 5.308 = 35.31 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 15/35.31 = 0.4248 A

Current through R₂

Subtract the drop across R₁ to get the voltage at node A, which is the voltage across R₂.

VA = V1 − IR1·R1 = 15 − 0.4248·30 = 2.255 V
IR2 = VA/R2 = 2.255/8 = 0.2819 A

Answer

IR2 = 0.2819 A
9.DC-DC converters

Answer: ΔIL = 0.5515 A

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 1 − 15/30 = 0.5

Inductor voltage during the on-time

While S is on, the inductor sits directly across Vin.

VL = 15 V

Ripple current

ΔIL = VL·D/(L·f) = 15·0.5/(68·10⁻⁶·200·10³) = 0.5515 A

Answer

ΔIL = 0.5515 A
10.DC-DC converters

Answer: ΔVo = 35.65 mV

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 3.6/12 = 0.3

Inductor ripple current

ΔIL = (12 − 3.6)·0.3/(47·10⁻⁶·20·10³) = 2.681 A

Output ripple

ΔVo = 2.681/(8·20·10³·470·10⁻⁶) = 35.65 mV

Answer

ΔVo = 35.65 mV
11.Wheatstone bridge & strain gauges

Answer: Rth = 184.6 Ω

Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.

Supply shorted

R₁∥R₂ = 50·80/130 = 30.77 Ω
R₃∥R₄ = 400·250/650 = 153.8 Ω

Thévenin resistance

Rth = 184.6 Ω

Answer

Rth = 184.6 Ω
12.Wheatstone bridge & strain gauges

Answer: ε = 1000 µε

Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.

Relative resistance change

ΔR/R = 2.05/1000 = 0.00205

Strain

ε = 0.00205/2.05 = 0.001 = 1000 µε

Answer

ε = 1000 µε
13.Digital logic: gates, K-maps & flip-flops

Answer: N = 5

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

ABCD000111100001111000110312040517060121131150141819011010

Group the 1s

Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.

B′C′D
BCD
AC′D
AB′C′
A′B′CD′

Minimal SOP form

F = B′C′D + BCD + AC′D + AB′C′ + A′B′CD′
N = 5

Answer

N = 5

Another grouping of the same size exists; it has the same number of terms and literals.

14.Digital logic: gates, K-maps & flip-flops

Answer: N = 3

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Prime implicants

The largest groups that can be formed from 1s and Xs.

BD, BC′, A′C′D′, AC′D, A′B
ABCD00011110000111101001030214151716X12X13X150140819011010

Essential prime implicants

A′C′D′, AC′D, A′B
N = 3

Answer

N = 3

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