Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.
Wheatstone bridge & strain gauges
Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε
Method
Treat the bridge as two voltage dividers across the same supply.
For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.
Digital logic: gates, K-maps & flip-flops
Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states
Method
For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.
2Practice problems
1.Diodes & transistorsMedium
An NPN transistor with β = 100 is biased by a base resistor RB = 470 kΩ from the supply VCC = 12 V. The collector resistor is RC = 1 kΩ and the emitter is grounded. Take VBE = 0.7 V and assume the transistor is in the active region. Find the collector current IC in mA.
VCC = 12 VRB = 470 kΩRC = 1 kΩβ = 100VBE = 0.7 V
IC = mA
2.Diodes & transistorsHard
A diode is modelled as 0.6 V in series with 25 Ω (it conducts above 0.6 V). It is in series with a 1000 Ω resistor across a 12 V supply. Find the operating current ID where the diode line meets the load line.
Vs = 12 VR = 1000 ΩV0 = 0.6 Vrd = 25 Ω
ID = mA
3.Op-amp circuitsMedium
Choose the feedback resistor Rf that gives this non-inverting amplifier a voltage gain of 31.
R1 = 4.7 kΩAv = 31
Rf = kΩ
4.Op-amp circuitsHard
The summing amplifier uses an ideal op-amp with ±15 V supplies. Find the current If through the feedback resistor, flowing towards the output.
A buck converter turns 36 V into 9 V for a 5 Ω load. It switches at 500 kHz with L = 47 µH. Find the peak inductor current Imax.
Vin = 36 VVo = 9 Vf = 500 kHzL = 47 µHR = 5 Ω
Imax = A
10.DC-DC convertersHard
An ideal buck-boost converter turns 9 V into −27 V for a 4 Ω load at 40 kHz. The output capacitor is 22 µF. Find the peak-to-peak output voltage ripple ΔVo in mV.
Vin = 9 VVo = −27 Vf = 40 kHzC = 22 µFR = 4 Ω
ΔVo = mV
11.Wheatstone bridge & strain gaugesMedium
A bridge has four 400 Ω arms and Vs = 10 V. The sensor R₂ increases by ΔR = 40 Ω. Find the exact output Vab in mV.
Vs = 10 VR = 400 ΩΔR = 40 Ω
Vab = mV
12.Wheatstone bridge & strain gaugesHard
A load cell (a full bridge of strain gauges) has a rated output of 2.5 mV/V at its rated load of 100 kg. It is excited with 10 V. Find its output Vo under a load of 40 kg.
Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(2, 5, 15). How many literals L does it contain in total (a primed variable counts as one literal)?
F(A, B, C, D) = Σm(2, 5, 15)
L =
14.Digital logic: gates, K-maps & flip-flopsHard
A 4-bit ripple (asynchronous) counter is built from flip-flops with a propagation delay of 20 ns each. All outputs must have settled before the next clock edge. Find the maximum clock frequency fmax.
n = 4tpd = 20 ns
fmax = MHz
3Solutions
1.Diodes & transistors
Answer: IC = 2.404 mA
BJT bias point: in the active region VBE = 0.7 V, IC = β·IB and IE = (β + 1)·IB. Find IB from the base loop with KVL, then IC, then VCE from the collector–emitter loop. A voltage divider at the base is replaced by its Thévenin equivalent VTH = VCC·R₂/(R₁ + R₂), RTH = R₁∥R₂; an emitter resistor appears (β + 1) times larger in the base loop.
Check: VCE = 9.596 V is well above 0.2 V, so the transistor is indeed active.
2.Diodes & transistors
Answer: ID = 11.12 mA
LED and diode circuits: a forward-biased LED drops roughly its forward voltage VF (about 2 V for red, 3 V for blue or white), whatever the current. A series resistor sets the current: R = (Vs − n·VF)/I for n LEDs in series. With a more exact diode model V = V₀ + I·rd, the operating point is where the diode line meets the load line I = (Vs − V)/R, so I = (Vs − V₀)/(R + rd).
Combine the two equations
12 = 0.6 + I·(1000 + 25)
Operating current
ID = 11.4/1025 = 11.12 mA
VD = 0.6 + 0.01112·25 = 0.878 V
Answer
ID = 11.12 mA
3.Op-amp circuits
Answer: Rf = 141 kΩ
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Gain of a non-inverting amplifier
V₋ = V₊ = Vin, and the current through R₁ also flows through Rf, so Vout = Vin·(1 + Rf/R₁).
Av = 1 + Rf/R1
Rf = (31 − 1)·4.7 = 141 kΩ
Answer
Rf = 141 kΩ
4.Op-amp circuits
Answer: If = 0.03143 mA
Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.
Input currents
V₋ = 0, so each input resistor has its full input voltage across it.
I1 = V1/R1 = −0.9/100 = −0.009 mA
I2 = V2/R2 = 1.9/47 = 0.04043 mA
If = I1 + I2 = 0.03143 mA
Answer
If = 0.03143 mA
5.RC & RL transients
Answer: vL = 2.061 V
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Time constant and final current
Long after the switch closes the inductor behaves like a short circuit, so the final current is set by R alone.
τ = L/R = 22 mH / 10 Ω = 2.2 ms
i(∞) = Vs/R = 20/10 = 2 A
Inductor voltage
At t = 0 the whole supply voltage appears across the inductor; it then decays to zero.
vL(t) = Vs·e−t/τ = 20·e−5/2.2 = 2.061 V
Answer
vL = 2.061 V
6.RC & RL transients
Answer: t = 62.31 ms
First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.
Initial value, final value, time constant
The capacitor voltage cannot jump, so it starts at its stored value and heads for the source voltage.
t = τ·ln((4 − 12)/(8.8 − 12)) = 68·ln(2.5) = 62.31 ms
Answer
t = 62.31 ms
7.Series & parallel resistors
Answer: IR1 = 0.4286 A
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R3 + R4 = 4 + 4 = 8 Ω
R2 ∥ 8 = 8·8/(8+8) = 4 Ω
Req = R1 + 4 = 10 + 4 = 14 Ω
Current from the source
The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.
IR1 = V1/Req = 6/14 = 0.4286 A
Answer
IR1 = 0.4286 A
8.Series & parallel resistors
Answer: Req = 13.85 Ω
Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.
Combine resistors from the far end
Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.
R5 + R6 = 5 + 6 = 11 Ω
R4 ∥ 11 = 5.739 Ω
R3 + 5.739 = 10.74 Ω
R2 ∥ 10.74 = 3.849 Ω
Req = R1 + 3.849 = 10 + 3.849 = 13.85 Ω
Answer
Req = 13.85 Ω
9.DC-DC converters
Answer: Imax = 1.944 A
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 9/36 = 0.25
Average and ripple current
Io = 9/5 = 1.8 A
ΔIL = VL·D/(L·f) = 27·0.25/(47·10⁻⁶·500·10³) = 0.2872 A
Peak current
Imax = 1.8 + 0.2872/2 = 1.944 A
Answer
Imax = 1.944 A
10.DC-DC converters
Answer: ΔVo = 5753 mV
DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.
Duty cycle
D = 27/(9 + 27) = 0.75
Load current
Io = 27/4 = 6.75 A
Output ripple
ΔVo = 6.75·0.75/(40·10³·22·10⁻⁶) = 5753 mV
Answer
ΔVo = 5753 mV
11.Wheatstone bridge & strain gauges
Answer: Vab = 238.1 mV
Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.
Node voltages
Va = 10·440/840 = 5.238 V
Vb = 5 V
Output
Vab = 238.1 mV
Answer
Vab = 238.1 mV
The linear estimate Vs·ΔR/(4R) = 250 mV is 5 % too high: a quarter bridge is not quite linear.
12.Wheatstone bridge & strain gauges
Answer: Vo = 10 mV
Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.
Full-scale output
2.5·10 = 25 mV
Output at this load
Vo = 25·40/100 = 10 mV
Answer
Vo = 10 mV
13.Digital logic: gates, K-maps & flip-flops
Answer: L = 12
Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.
Group the 1s
Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.
A′B′CD′
A′BC′D
ABCD
Minimal SOP form
F = A′B′CD′ + A′BC′D + ABCD
L = 12
Answer
L = 12
14.Digital logic: gates, K-maps & flip-flops
Answer: fmax = 12.5 MHz
Flip-flops and counters: a flip-flop changes only at the active clock edge. D copies its input (Q⁺ = D); T toggles when T = 1; JK holds for 00, resets for 01, sets for 10 and toggles for 11. An n-bit binary counter has 2ⁿ states and counts modulo 2ⁿ; a mod-N counter goes 0, 1, …, N − 1 and back to 0, and needs the smallest n with 2ⁿ ≥ N flip-flops. Each stage of a ripple counter halves the frequency, so the last output of a mod-N counter runs at fclk/N. A Johnson counter of n flip-flops has 2n states, a ring counter n.