Electronics 1: cram pack

Formula sheets, the key method steps for every topic and 14 practice problems, with full solutions at the back.

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1Formulas and methods

Diodes & transistors

Diode (constant drop)
VD = 0.7 V when conducting
Active region
VBE = 0.7 V, IC = β·IB, IE = (β + 1)·IB
Fixed bias
IB = (VCC − 0.7)/RB
Divider bias
IB = (VTH − 0.7)/(RTH + (β + 1)RE)
Thévenin of the divider
VTH = VCC·R2/(R1 + R2), RTH = R1∥R2
Collector loop
VCE = VCC − ICRC − IERE
Saturation
IC(sat) = (VCC − VCE(sat))/RC, IB ≥ IC(sat)/β

Op-amp circuits

Inverting amplifier
Vout = −(Rf/Rin)·Vin
Non-inverting amplifier
Vout = (1 + Rf/R1)·Vin
Summing amplifier
Vout = −Rf(V1/R1 + V2/R2)
Ideal op-amp
V+ = V−, Iin = 0

RC & RL transients

Time constant
τ = RC | τ = L/R
Response
x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ
Capacitor at DC
open circuit; vC cannot jump
Inductor at DC
short circuit; iL cannot jump
Settled
t ≈ 5τ

Method

  1. Find the initial value just after switching: a capacitor voltage and an inductor current cannot jump.
  2. Find the final value long after switching: a capacitor acts as an open circuit, an inductor as a short circuit.
  3. Find the time constant: τ = RC or τ = L/R, using the resistance seen by the capacitor or inductor.
  4. Use x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ.

Series & parallel resistors

Resistors in series
Req = R1 + R2 + …
Resistors in parallel
1/Req = 1/R1 + 1/R2 + …
Two in parallel
Req = R1R2 / (R1 + R2)
Ohm's law
V = I·R
Power
P = V·I = I²R = V²/R

Method

  1. Start at the end of the network furthest from the terminals.
  2. Combine resistors in series by adding them, and resistors in parallel with 1/R = 1/R₁ + 1/R₂ + …
  3. Redraw the circuit after each step.
  4. Repeat until one resistor is left between the terminals.

DC-DC converters

Buck
Vo = D·Vin
Boost
Vo = Vin/(1 − D)
Inverting buck-boost
|Vo| = Vin·D/(1 − D)
Ideal power balance
VinIin = VoIo
Inductor ripple
ΔIL = VL,on·D/(L·f); buck Vin − Vo, boost and buck-boost Vin
Average inductor current
buck Io; boost and buck-boost Io/(1 − D)
Output ripple
buck ΔIL/(8fC); boost and buck-boost Io·D/(fC)
CCM boundary
buck (1 − D)R/(2f); boost D(1 − D)²R/(2f); buck-boost (1 − D)²R/(2f)

Method

  1. Identify the converter (buck, boost or buck-boost) and the duty cycle D from the voltage ratio.
  2. Use volt-second balance on the inductor: the average inductor voltage over a period is zero.
  3. Find the inductor voltage while the switch is on, then ΔIL = VL·D/(L·f).
  4. For the output ripple, find the charge that flows in and out of the capacitor; for the CCM boundary, set the average inductor current equal to ΔIL/2.

Wheatstone bridge & strain gauges

Divider voltages
Va = VsR2/(R1 + R2), Vb = VsR4/(R3 + R4)
Output
Vab = Va − Vb
Balance
R1/R2 = R3/R4
Slide-wire bridge
R/Rx = l/(100 − l)
Thévenin resistance
Rth = R1∥R2 + R3∥R4
Gauge factor
ΔR/R = GF·ε
Bridge output
quarter Vs·GF·ε/4, half Vs·GF·ε/2, full Vs·GF·ε
Small change, one arm
Vab ≈ Vs·ΔR/(4R)
Stress
σ = E·ε

Method

  1. Treat the bridge as two voltage dividers across the same supply.
  2. For balance, set R₁/R₂ = R₃/R₄ and solve for the unknown resistor.
  3. For an unbalanced bridge, find Va and Vb from the dividers and subtract; use the Thévenin equivalent when a meter loads the output.
  4. For strain gauges, convert strain to ΔR/R = GF·ε and use Vs·GF·ε/4, /2 or ×1 for a quarter, half or full bridge.

Digital logic: gates, K-maps & flip-flops

Basic gates
A·B, A + B, A′, (A·B)′, (A + B)′, A ⊕ B
Boolean rules
X + X′ = 1, X·X′ = 0, X + XY = X, XY + XY′ = X
De Morgan
(X·Y)′ = X′ + Y′, (X + Y)′ = X′·Y′
Karnaugh map order
00, 01, 11, 10 (Gray code)
Group of 2ᵏ cells
loses k variables
4-to-1 multiplexer
F = A′B′I0 + A′BI1 + AB′I2 + ABI3
Flip-flops
D: Q⁺ = D, T: Q⁺ = T ⊕ Q, JK: Q⁺ = JQ′ + K′Q
Counters
n-bit: 2ⁿ states; mod-N: smallest n with 2ⁿ ≥ N; fout = fclk/N
Ripple counter
fmax = 1/(n·tpd)
Ring and Johnson counters
n and 2n states

Method

  1. For a circuit, work from the inputs to the output one gate at a time and write the value on every wire, or write its expression and fill in the truth table.
  2. For simplification, put the 1s (and the don’t-cares as X) into a Karnaugh map with Gray-code rows and columns: 00, 01, 11, 10.
  3. Cover the 1s with as few and as large groups of 1, 2, 4, 8 or 16 cells as possible, wrapping round the edges; each group is one product term made of the variables that stay constant. Group the 0s for the POS form.
  4. For flip-flops and counters, read the inputs at each active clock edge, write the state after every edge, and remember that an n-bit counter wraps round after 2ⁿ states.

2Practice problems

1.Diodes & transistorsMedium
RC​ = 4.7 kΩβ = 120IC​ = ?RE​ = 2.2 kΩVCC​ = 15 VR1​ = 47 kΩR2​ = 15 kΩ

An NPN transistor with β = 120 has voltage-divider bias from VCC = 15 V: R₁ = 47 kΩ from VCC to the base and R₂ = 15 kΩ from the base to ground. The collector resistor is RC = 4.7 kΩ and the emitter resistor is RE = 2.2 kΩ. Take VBE = 0.7 V and use the Thévenin equivalent of the divider (do not neglect the base current). Find the collector current IC in mA.

VCC = 15 VR1 = 47 kΩR2 = 15 kΩRC = 4.7 kΩRE = 2.2 kΩβ = 120
IC = mA
2.Diodes & transistorsHard
RC​ = 680 Ωβ = 80IC​ = ?VCC​ = 5 V5 VRB​ = 1 kΩ

An NPN transistor with β = 80 switches a 680 Ω load resistor connected between VCC = 5 V and its collector. The emitter is grounded. The base is driven from a 5 V logic output through a base resistor RB = 1 kΩ. Take VBE = 0.7 V and VCE(sat) = 0.2 V. Find the collector current IC in mA when the input is high. Decide first whether the transistor is saturated.

VCC = 5 VRC = 680 Ωβ = 80Vin = 5 VVBE = 0.7 VVCE(sat) = 0.2 VRB = 1 kΩ
IC = mA
3.Op-amp circuitsMedium
−+Vout​Rf​ = 100 kΩR1​ = 22 kΩVin​ = 0.6 V

The op-amp is ideal and runs from ±15 V supplies. Find the output voltage Vout.

Vin = 0.6 VR1 = 22 kΩRf = 100 kΩ
Vout = V
4.Op-amp circuitsHard
−+Vout​Rf​ = 2 kΩV1​ = 1.8 VR1​ = 2 kΩV2​ = 1 VR2​ = 1 kΩ

The summing amplifier uses an ideal op-amp with ±15 V supplies. Find the output voltage Vout.

V1 = 1.8 VV2 = 1 VR1 = 2 kΩR2 = 1 kΩRf = 2 kΩ
Vout = V
5.RC & RL transientsMedium
+−Vs​20 Vt = 0R1​ = 2.2 kΩR2​ = 10 kΩC33 µF+−vC​

The source Vₛ charges the capacitor through R₁, and R₂ is connected in parallel with C. The capacitor is uncharged when the switch closes at t = 0. Find the capacitor voltage vC at t = 25 ms.

Vs = 20 VR1 = 2.2 kΩR2 = 10 kΩC = 33 µFt = 25 ms
vC = V
6.RC & RL transientsHard
+−Vs​10 Vt = 0R = 3.3 kΩC220 µF+−vC​vC​(0) = 15 V

Just before the switch closes at t = 0, the capacitor holds 15 V with the polarity shown. Find the capacitor voltage vC at t = 250 ms.

Vs = 10 VR = 3.3 kΩC = 220 µFvC(0) = 15 Vt = 250 ms
vC = V
7.Series & parallel resistorsMedium
R1​ = 6 ΩIR1​R3​ = 8 Ω+−V1​9 VR2​20 ΩAR4​12 ΩB

Find the current IR1 delivered by the source, which flows through R1.

V1 = 9 VR1 = 6 ΩR2 = 20 ΩR3 = 8 ΩR4 = 12 Ω
IR1 = A
8.Series & parallel resistorsHard
R1​ = 4 ΩIR1​R3​ = 30 ΩR5​ = 4 Ω+−V1​18 VR2​3 ΩAR4​8 ΩBR6​8 Ω

Find the current IR1 delivered by the source, which flows through R1.

V1 = 18 VR1 = 4 ΩR2 = 3 ΩR3 = 30 ΩR4 = 8 ΩR5 = 4 ΩR6 = 8 Ω
IR1 = A
9.DC-DC convertersMedium
tiL​Imax​Imin​ΔI = ?DTT2T

An ideal boost converter turns 48 V into 192 V at 50 kHz with L = 220 µH. Find the peak-to-peak inductor ripple current ΔIL.

Vin​ = 48 VVo​ = 192 Vf = 50 kHzL = 220 µH
ΔIL = A
10.DC-DC convertersHard
tiL​Imax​IL​DTT2T

An ideal boost converter turns 12 V into 20 V for a 2 Ω load at 40 kHz. Find the smallest inductance Lcrit for continuous conduction.

Vin​ = 12 VVo​ = 20 Vf = 40 kHzR = 2 Ω
Lcrit = µH
11.Wheatstone bridge & strain gaugesMedium
+−6 V150 Ω150 Ω + ΔR150 Ω150 Ωab+−Vab​ = ?

A bridge has four 150 Ω arms and Vs = 6 V. The sensor R₂ increases by ΔR = 12 Ω. Find the exact output Vab in mV.

Vs = 6 VR = 150 ΩΔR = 12 Ω
Vab = mV
12.Wheatstone bridge & strain gaugesHard
+−10 V350 Ω350 Ω + ΔR350 Ω350 Ωab+−6.15 mV

A quarter bridge with one active gauge (GF = 2.05) is excited with 10 V. Under load the output reads 6.15 mV. Find the strain ε in µε.

Vs = 10 VGF = 2.05Vo = 6.15 mV
ε = µε
13.Digital logic: gates, K-maps & flip-flopsMedium
ABCD000111100001111010110302140507161120130151140809011010

Use the Karnaugh map to find the minimal sum-of-products (SOP) form of F(A, B, C, D) = Σm(0, 1, 4, 6, 12, 14). How many literals L does it contain in total (a primed variable counts as one literal)?

F(A, B, C, D) = Σm(0, 1, 4, 6, 12, 14)
L =
14.Digital logic: gates, K-maps & flip-flopsHard
ABCD00011110000111100011X30204151716012113X15X141809011010

For F(A, B, C, D) = Σm(1, 5, 6, 7, 8, 13) + d(3, 14, 15), where d marks the don't-care conditions, find the number N of essential prime implicants.

F(A, B, C, D) = Σm(1, 5, 6, 7, 8, 13) + d(3, 14, 15)
N =

3Solutions

1.Diodes & transistors

Answer: IC = 1.266 mA

BJT bias point: in the active region VBE = 0.7 V, IC = β·IB and IE = (β + 1)·IB. Find IB from the base loop with KVL, then IC, then VCE from the collector–emitter loop. A voltage divider at the base is replaced by its Thévenin equivalent VTH = VCC·R₂/(R₁ + R₂), RTH = R₁∥R₂; an emitter resistor appears (β + 1) times larger in the base loop.

Thévenin equivalent of the divider

VTH = 15·15/(47 + 15) = 3.629 V
RTH = 47·15/(47 + 15) = 11.37 kΩ

Base current

KVL around the base loop; the emitter current is (β + 1)·IB.

IB = (3.629 − 0.7)/(11.37 + 121·2.2) = 10.55 µA

Collector current

IC = 120·10.55 µA = 1.266 mA
IE = 121·10.55 µA = 1.277 mA

Answer

IC = 1.266 mA
2.Diodes & transistors

Answer: IC = 7.059 mA

BJT as a switch: to switch a load fully on, the transistor is driven into saturation, where VCE = VCE(sat) and the collector current is set by the load: IC(sat) = (VCC − VCE(sat))/RC. Saturation needs at least IB = IC(sat)/β. If the base current is smaller, the transistor stays active and IC = β·IB.

Base current

IB = (5 − 0.7)/1 kΩ = 4300 µA

Saturated or active?

β·IB is larger than IC(sat), so the transistor saturates.

β·IB = 344 mA
IC(sat) = (5 − 0.2)/680 = 7.059 mA

Collector current

IC = IC(sat) = 7.059 mA

Answer

IC = 7.059 mA

The transistor is saturated.

3.Op-amp circuits

Answer: Vout = 3.327 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Inverting input follows the input

V₋ = V₊ = 0.6 V
I = V₋/R1 = 0.6/22 = 0.02727 mA

Output voltage

The current through R₁ also flows through Rf.

Vout = V₋ + I·Rf = 0.6 + 0.02727·100 = 3.327 V

Answer

Vout = 3.327 V
4.Op-amp circuits

Answer: Vout = −3.8 V

Ideal op-amp rules: with negative feedback, the op-amp drives its output so that its two inputs sit at the same voltage (V₋ = V₊), and no current flows into either input. Writing KCL at the inverting input with these two facts gives the output.

Input currents

V₋ = 0, so each input resistor has its full input voltage across it.

I1 = V1/R1 = 1.8/2 = 0.9 mA
I2 = V2/R2 = 1/1 = 1 mA
If = I1 + I2 = 1.9 mA

Output voltage

Vout = −Rf·If = −2·1.9 = −3.8 V

Answer

Vout = −3.8 V
5.RC & RL transients

Answer: vC = 5.623 V

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Thévenin equivalent seen by the capacitor

Short the source to find Rth; open the capacitor to find the voltage it will settle at.

Rth = R1 ∥ R2 = 2.2·10/(2.2 + 10) = 1.803 kΩ
vC(∞) = 20·10/(2.2 + 10) = 16.39 V

Time constant

τ = Rth·C = 1.803·33 = 59.51 ms

Charging curve

vC(t) = 16.39·(1 − e−25/59.51) = 5.623 V

Answer

vC = 5.623 V
6.RC & RL transients

Answer: vC = 13.54 V

First-order transients: in a circuit with one capacitor or one inductor, every voltage and current moves exponentially from its initial value to its final value: x(t) = x(∞) + [x(0) − x(∞)]·e−t/τ, with τ = RC or τ = L/R. After about 5τ the circuit has settled.

Initial value, final value, time constant

The capacitor voltage cannot jump, so it starts at its stored value and heads for the source voltage.

vC(0) = 15 V, vC(∞) = Vs = 10 V
τ = R·C = 3.3 kΩ · 220 µF = 726 ms
vC(t) = 10 + (15 − 10)·e−t/τ

Voltage at the given time

vC(250) = 10 + (5)·e−250/726 = 13.54 V

Answer

vC = 13.54 V
7.Series & parallel resistors

Answer: IR1 = 0.5625 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 6 ΩR3​ = 8 Ω+−V1​9 VR2​20 ΩAR4​12 ΩB

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R3 + R4 = 8 + 12 = 20 Ω
R2 ∥ 20 = 20·20/(20+20) = 10 Ω
Req = R1 + 10 = 6 + 10 = 16 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 9/16 = 0.5625 A

Answer

IR1 = 0.5625 A
8.Series & parallel resistors

Answer: IR1 = 2.662 A

Series and parallel resistors: in series the same current flows through each resistor and R = R₁ + R₂ + …. In parallel each resistor has the same voltage and 1/R = 1/R₁ + 1/R₂ + …. A ladder network is reduced one pair at a time until a single equivalent resistance remains.

R1​ = 4 ΩR3​ = 30 ΩR5​ = 4 Ω+−V1​18 VR2​3 ΩAR4​8 ΩBR6​8 Ω

Combine resistors from the far end

Start at the end farthest from the source and work back towards it. Resistors carrying the same current are in series; resistors across the same two nodes are in parallel.

R5 + R6 = 4 + 8 = 12 Ω
R4 ∥ 12 = 4.8 Ω
R3 + 4.8 = 34.8 Ω
R2 ∥ 34.8 = 2.762 Ω
Req = R1 + 2.762 = 4 + 2.762 = 6.762 Ω

Current from the source

The source sees only Req, so Ohm’s law gives the current it delivers. That current flows through R₁.

IR1 = V1/Req = 18/6.762 = 2.662 A

Answer

IR1 = 2.662 A
9.DC-DC converters

Answer: ΔIL = 3.273 A

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 1 − 48/192 = 0.75

Inductor voltage during the on-time

While S is on, the inductor sits directly across Vin.

VL = 48 V

Ripple current

ΔIL = VL·D/(L·f) = 48·0.75/(220·10⁻⁶·50·10³) = 3.273 A

Answer

ΔIL = 3.273 A
10.DC-DC converters

Answer: Lcrit = 3.6 µH

DC-DC converters: a switch S turns on for the fraction D of each period T = 1/f. In steady state the average inductor voltage is zero (volt-second balance), which gives the ideal conversion ratios in continuous conduction: buck Vo = D·Vin, boost Vo = Vin/(1 − D), inverting buck-boost |Vo| = Vin·D/(1 − D). An ideal converter keeps the power: Vin·Iin = Vo·Io. While S is on the inductor current rises by ΔIL = VL·D·T/L, with VL = Vin − Vo for the buck and Vin for the boost and buck-boost. The output ripple is ΔVo = ΔIL/(8fC) for the buck and Io·D/(fC) for the boost and buck-boost. The inductor current just touches zero (the CCM boundary) when the average inductor current equals ΔIL/2.

Duty cycle

D = 1 − 12/20 = 0.4

Boundary condition

Set the average inductor current equal to half the ripple current and solve for L.

Lcrit = D(1 − D)²·R/(2f)

Critical inductance

Lcrit = 0.4(1 − 0.4)²·2/(240·10³) = 3.6 µH

Answer

Lcrit = 3.6 µH
11.Wheatstone bridge & strain gauges

Answer: Vab = 115.4 mV

Wheatstone bridge: two voltage dividers share one supply Vs. The left divider R1–R2 gives Va = Vs·R2/(R1 + R2) and the right divider R3–R4 gives Vb = Vs·R4/(R3 + R4); the output is Vab = Va − Vb. The bridge is balanced (Vab = 0, no current in the meter) when R1/R2 = R3/R4, that is R1·R4 = R2·R3. Seen from the output, the bridge is a Thévenin source with Rth = R1∥R2 + R3∥R4.

Node voltages

Va = 6·162/312 = 3.115 V
Vb = 3 V

Output

Vab = 115.4 mV

Answer

Vab = 115.4 mV

The linear estimate Vs·ΔR/(4R) = 120 mV is 4 % too high: a quarter bridge is not quite linear.

12.Wheatstone bridge & strain gauges

Answer: ε = 1200 µε

Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives Vo ≈ Vs·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give Vs·GF·ε/2, and four (full bridge) give Vs·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.

Solve the quarter-bridge equation

ε = 4·0.00615/(10·2.05) = 0.0012

In microstrain

ε = 1200 µε

Answer

ε = 1200 µε
13.Digital logic: gates, K-maps & flip-flops

Answer: L = 5

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

ABCD000111100001111010110302140507161120130151140809011010

Group the 1s

Every group is a rectangle of 2ᵏ cells; edge cells are neighbours of the cells on the opposite edge.

BD′
A′B′C′

Minimal SOP form

F = BD′ + A′B′C′
L = 5

Answer

L = 5
14.Digital logic: gates, K-maps & flip-flops

Answer: N = 4

Karnaugh maps: the cells are ordered in Gray code (00, 01, 11, 10), so neighbouring cells, including the ones across the edges, differ in exactly one variable. Group the 1s in rectangles of 1, 2, 4, 8 or 16 cells, as large as possible and as few as possible, until every 1 is covered. Each group is one product term: the variables that stay constant inside it. A group of 2ᵏ cells loses k variables. Don't-cares (X) may be used to make groups bigger but never have to be covered. Grouping the 0s instead gives the minimal POS form.

Prime implicants

The largest groups that can be formed from 1s and Xs.

BD, BC, A′D, AB′C′D′
ABCD00011110000111100011X30204151716012113X15X141809011010

Essential prime implicants

BD, BC, A′D, AB′C′D′
N = 4

Answer

N = 4

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