Mechatronic Systems: cram pack

DC motor: the armature is a resistance R_a in series with the back-EMF E, so V = E + I_a·R_a. The back-EMF grows with speed, E = k·ω, and the torque with current, T = k·I_a, with the same motor constant k (V·s/rad = N·m/A) in SI units. Convert speeds with ω = 2π·n/60. The developed power is E·I_a = T·ω; the input power is V·I_a, and the copper loss I_a²R_a and the rotational loss make the difference. The speed falls in a straight line with torque, ω = V/k − R_a·T/k², from the no-load speed V/k to zero at the stall torque k·V/R_a. At standstill E = 0, so the starting current V/R_a is large unless a resistor limits it.

DC motor: the armature is a resistance R_a in series with the back-EMF E, so V = E + I_a·R_a. The back-EMF grows with speed, E = k·ω, and the torque with current, T = k·I_a, with the same motor constant k (V·s/rad = N·m/A) in SI units. Convert speeds with ω = 2π·n/60. The developed power is E·I_a = T·ω; the input power is V·I_a, and the copper loss I_a²R_a and the rotational loss make the difference. The speed falls in a straight line with torque, ω = V/k − R_a·T/k², from the no-load speed V/k to zero at the stall torque k·V/R_a. At standstill E = 0, so the starting current V/R_a is large unless a resistor limits it.

Gear trains: meshing gears have the same speed at the teeth, so n₁·N₁ = n₂·N₂: the gear with fewer teeth turns faster. Gears on one shaft turn at the same speed. Power is passed on (minus losses), so torque goes up when speed goes down: T₂ = T₁·(N₂/N₁)·η, and P = T·ω with ω = 2π·n/60.

Gear trains: meshing gears have the same speed at the teeth, so n₁·N₁ = n₂·N₂: the gear with fewer teeth turns faster. Gears on one shaft turn at the same speed. Power is passed on (minus losses), so torque goes up when speed goes down: T₂ = T₁·(N₂/N₁)·η, and P = T·ω with ω = 2π·n/60.

Data rates: every channel delivers f_s samples per second of N bits, so the raw rate is channels × f_s × N bit/s. In memory a sample takes whole bytes (a 12-bit sample is stored in 2 bytes), so the memory for a recording is channels × f_s × bytes per sample × time. A multiplexed ADC converts the channels one after another: each conversion (with settling) takes t, so one round of n channels takes n·t and each channel is sampled at 1/(n·t).

UART: an asynchronous serial link sends each byte as a frame: one start bit (low), the data bits, an optional parity bit and one or two stop bits (high). The baud rate is the number of bits per second, so one bit lasts T_b = 1/baud and a frame of n bits lasts n/baud. The common 8N1 format has 10 bits per byte. The baud generator divides the clock: baud = f_clk/(16·D) with a whole number D, so the real baud rate differs slightly from the target; an error below about 2 % is usually acceptable.

Wheatstone bridge: two voltage dividers share one supply V_s. The left divider R₁–R₂ gives V_a = V_s·R₂/(R₁ + R₂) and the right divider R₃–R₄ gives V_b = V_s·R₄/(R₃ + R₄); the output is V_ab = V_a − V_b. The bridge is balanced (V_ab = 0, no current in the meter) when R₁/R₂ = R₃/R₄, that is R₁·R₄ = R₂·R₃. Seen from the output, the bridge is a Thévenin source with R_th = R₁∥R₂ + R₃∥R₄.

Strain gauges: a gauge changes its resistance with strain: ΔR/R = GF·ε, where the gauge factor GF is about 2 for metal foil. In a bridge with all arms equal to R, one active gauge (quarter bridge) gives V_o ≈ V_s·GF·ε/4. Two active gauges with opposite strains in adjacent arms (half bridge) give V_s·GF·ε/2, and four (full bridge) give V_s·GF·ε. Stress follows from Hooke’s law, σ = E·ε. Load cells state their sensitivity in mV/V: the output at full load per volt of excitation.

Steady-state error: in a unity-feedback loop with open-loop transfer function G(s) the error is E(s) = R(s)/(1 + G(s)), and by the final value theorem e_ss = lim_s→0 s·E(s). The system type is the number of poles of G(s) at s = 0. The error constants are K_p = lim G(s), K_v = lim s·G(s) and K_a = lim s²·G(s), all for s → 0. A step of size A gives e_ss = A/(1 + K_p), a ramp A·t gives A/K_v and a parabola A·t²/2 gives A/K_a. A type-0 loop follows a step with a finite error, a type-1 loop follows it exactly and a ramp with a finite error.

P, PI and PID control: the controller C(s) = K_p + K_i/s + K_d·s acts on the error. A proportional gain makes the loop faster and reduces the error of a type-0 plant, but never removes it. The integral term adds a pole at s = 0: the system type rises by one, and a step is followed without error. The derivative term adds damping. To choose gains, write the closed-loop characteristic polynomial and compare it with s² + 2ζω_ns + ω_n². Then %OS = 100·e^{−ζπ/√(1−ζ²)}, t_p = π/ω_d with ω_d = ω_n√(1 − ζ²), and t_s ≈ 4/(ζω_n).

Step response: a first-order system G(s) = K/(τs + 1) answers a step of size U with y(t) = K·U·(1 − e^−t/τ): it reaches 63.2 % of the final value K·U after one time constant τ and 98 % after 4τ. A second-order system G(s) = K·ωₙ²/(s² + 2ζωₙs + ωₙ²) has the poles s = −ζωₙ ± jω_d with ω_d = ωₙ√(1 − ζ²). For 0 < ζ < 1 the step response overshoots: percent overshoot %OS = 100·e^{−ζπ/√(1−ζ²)}, peak time t_p = π/ω_d, and the 2 % settling time t_s ≈ 4/(ζωₙ). Compare the denominator with s² + 2ζωₙs + ωₙ² to read off ωₙ and ζ. For a mass–spring–damper ωₙ = √(k/m) and ζ = c/(2√(km)); for a series RLC circuit ωₙ = 1/√(LC) and ζ = (R/2)·√(C/L).

Step response: a first-order system G(s) = K/(τs + 1) answers a step of size U with y(t) = K·U·(1 − e^−t/τ): it reaches 63.2 % of the final value K·U after one time constant τ and 98 % after 4τ. A second-order system G(s) = K·ωₙ²/(s² + 2ζωₙs + ωₙ²) has the poles s = −ζωₙ ± jω_d with ω_d = ωₙ√(1 − ζ²). For 0 < ζ < 1 the step response overshoots: percent overshoot %OS = 100·e^{−ζπ/√(1−ζ²)}, peak time t_p = π/ω_d, and the 2 % settling time t_s ≈ 4/(ζωₙ). Compare the denominator with s² + 2ζωₙs + ωₙ² to read off ωₙ and ζ. For a mass–spring–damper ωₙ = √(k/m) and ζ = c/(2√(km)); for a series RLC circuit ωₙ = 1/√(LC) and ζ = (R/2)·√(C/L).