Digital logic: gates, K-maps & flip-flops worksheet with answers

The propagation delay of every gate is written under it. Find the worst-case propagation delay t_pd from the inputs to the output F.

The function F = (A′·B′)·C is 1 for exactly one combination of the inputs. Click that row of the truth table.

1. 1ABC = 000
2. 2ABC = 001
3. 3ABC = 010
4. 4ABC = 011
5. 5ABC = 100
6. 6ABC = 101
7. 7ABC = 110
8. 8ABC = 111

Use the Karnaugh map to find the minimal product-of-sums (POS) form of F(A, B, C) = Σm(2, 3, 4, 5, 6). How many sum terms (factors) N does it have?

In this Karnaugh map exactly one 1 has no neighbouring 1, so it stays a group of one cell (a full minterm of four literals) in the minimal SOP form. Neighbours across the map edges count. Click that cell.

1. 1AB = 00, CD = 00
2. 2AB = 00, CD = 01
3. 3AB = 00, CD = 11
4. 4AB = 00, CD = 10
5. 5AB = 01, CD = 00
6. 6AB = 01, CD = 01
7. 7AB = 01, CD = 11
8. 8AB = 01, CD = 10
9. 9AB = 11, CD = 00
10. 10AB = 11, CD = 01
11. 11AB = 11, CD = 11
12. 12AB = 11, CD = 10
13. 13AB = 10, CD = 00
14. 14AB = 10, CD = 01
15. 15AB = 10, CD = 11
16. 16AB = 10, CD = 10

A 3-bit binary down counter starts at 1 (decimal, Q = 001). Which count Q (in decimal) does it show after 20 clock pulses?

A 4-bit shift register Q₃Q₂Q₁Q₀ holds 0011. At every clock edge the bits shift one place to the right (Q₃ → Q₂ → Q₁ → Q₀, Q₀ is lost) and the serial input enters Q₃. The serial input is 0, 0, 1, 0, 1 at the 5 edges. Give the final state Q = Q₃Q₂Q₁Q₀ as a decimal number.